Homepage of Wim Heirman

Welcome to the homepage of Wim Heirman. I am a computer architecture researcher and practitioner based in Ghent, Belgium. I am currently working as a research scientist for Intel Corporation. Between August 2003 and December 2013, I was a Ph.D. student and later a post-doc at the Computer Systems Lab, which is part of the Electronics and Information Systems (ELIS) department of Ghent University in Belgium.

I can be reached by e-mail at: wim@heirman.net

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Contents: Research Interests | Publications | Personal Interests
Quick links: My PhD thesis | Publications | Photos

As of January 2014, I am working as a research scientist at Intel Corporation in the datacenter group where I work on processor architecture, performance analysis and optimization, mostly related to the Xeon Phi product family.

Between July 2010 and December 2013, I was part of the Flanders ExaScience Lab. This lab develops software to run on Intel-based future exascale computer systems delivering up to 1 ExaFLOPS, which is 100 times the performance of today's fastest supercomputers. The ExaScience Lab is a member of Intel's European research network – Intel Labs Europe – that consists of 21 labs employing more than 900 R&D professionals.

The PerformanceLab research group at Ghent University takes part in the ExaScience project, and is responsible for developing simulation tools that can quickly and accurately predict the performance, reliability and power requirements of future exascale HPC installations. Our simulator, Sniper, has been released as open source and can be used freely in academic research projects.

Between 2008 and 2010 I worked on the OptiMMA project. The research of this project will enable the mapping of emerging, dynamic software applications on complex Multi-Processor Systems-on-Chip (MP-SoC). This will be achieved through the use of Middleware components, which will be able to mediate between embedded software and the hardware platforms. Thus, they manage at run-time the memory storage, energy consumption, bandwidth and computation resources of the embedded system. Modeling and customization of the Middleware components is a key element of the OptiMMA project. It will create a broad user base and enables the valorization of the results among a wide body of economic actors in Flanders.

The OptiMMA project is funded by IWT Vlaanderen, the Institute for the Promotion of Innovation by Science and Technology in Flanders.

The enormous computing power of multi-processor systems and manufacturing tools now on the drawing table will require data transfer rates of over 100Terabit/s. These data rates may be needed on-chip, e.g. in multicore processors, which are expected to need total on-chip data rates of up to 100TB/s by 2015, or off-chip, e.g. in short distance data interconnects, requiring up to 100TB/s over a 10m to 100m long distance. The only viable technology for transmitting this level of information is using optical interconnects. Besides a huge data rate, optical interconnects also allow for additional flexibility through the use of wavelength division multiplexing. This additional flexibility may be employed for the realization of more intelligent interconnect systems, such as the optical network-on-chip system also investigated in this project.

WADIMOS will build a complex photonic interconnect layer incorporating multi-channel microsources, microdetectors and different advanced wavelength routing functions directly integrated with electronic driver circuits and demonstrate the application of such electro-photonic ICs in two representative applications, an on-chip optical network and a terabit optical datalink.

The WADIMOS project is funded by the European Communion's Seventh Research Framework Programme (FP7).

Electrical interconnection networks are being replaced by optical ones on ever shorter distances. Recent advances in inter-chip optical interconnection technologies will allow us to build tightly coupled, optically connected multiprocessor machines in the very near future. Currently, optical technologies like Myrinet and Fiber Ethernet are building blocks for large clusters, based on the message passing paradigm. The higher bandwidth, lower latency and reconfigurability of inter-chip optics (that is, directly between the digital VLSI components, avoiding slow, power-hungry and EMI-plagued electrical pins and PCBs) will allow us to build faster machines that provide a shared memory environment.

My part in this was to investigate which of the many possible optical interconnection architectures can benefit a shared memory multiprocessor, and thus finding out how the next generation of machines like the Sun Fire and SGI Altix servers may look like. Most of this task was done by simulation of the various architectures. I have set up an evaluation environment consisting of the full-system simulator Simics and the SPLASH-2 benchmarks as a workload. Since Simics only does functional simulation, I wrote a number of extension modules that model a cache-coherent, non-uniform memory access model (ccNUMA) architecture. Since these simulations take a long time, I have also looked at ways to predict performance based on network parameters, without the need for a full simulations. This is especially usefull for network designers so they can do quick design space explorations.

On July 9, 2008, I defended my Ph.D. thesis on this subject, “Reconfigurable optical interconnects in shared-memory multiprocessor systems.” The complete text, a summary and more can be found on this page.

This work was being done as part of the IAP-V 18 PHOTON and IAP-VI 10 photonics@be networks, sponsored by the Belgian Science Policy Office.

In 2009, I co-founded Dwengo, together with five other PhD students from the Computer Systems Lab. Dwengo vzw is a non-profit organisation that supports people who like to experiment with microcontrollers, and grew out of our local IEEE Student Branch's “Workshop on Electronics” (WELEK) at Ghent University. From there, we're slowly branching out into other areas such as Flemish technical high schools. Dwengo sells an Arduino-compatible microcontroller board, the “Dwenguino”, which is aimed at robotics and general experimentation with microcontrollers. In contrasts to our main competititors, we try to stand out with our excellent documentation and tutorials and as such fulfill our slogan to easily “get you started with microcontrollers”.